Email Print


The 9th MRAM Global Innovation Forum (7 Dec 2017)
Dec 7, 2017 - Dec 7, 2017



To strengthen the relationship between the microelectronics and magnetism communities in order to accelerate the development of MRAM technology, a MRAM Forum is organized by the IEEE Magnetics Society the day following IEDM to allow IEDM attendees to participate. This will be the 9th MRAM Global Innovation Forum (Hilton Union Square, Plaza room on Lobby level, 7 Dec 2017). This is a one-day forum organized on 7 December 2017 (8:45am - 5:30pm) in the same hotel as IEDM (Hilton Union Square, 333 O'Farrell St, San Francisco). The Forum will consist of 10 invited talks from leading experts and a panel discussion.  The program is indicated below. Various MRAM related topics will be covered including STT-MRAM technology, memory and processor demonstrations, spin orbit torque MRAM, and the needs, challenges and potential of MRAM. The Forum was originally initiated by Samsung Semiconductor, and this forum marks the 9th edition of the series.

The Forum is entirely sponsored by Samsung Semiconductor so that registration to the Forum is free of charge, including free lunch. However the number of attendees is limited. To register to the Forum, send an email to">  with first name, last name, contact email, affiliation. A confirmation email will be sent to you. The deadline for registration is 5th November 2017.

Bernard DIENY and Bruce TERRIS

Program committee: Bernard Dieny (chair, SPINTEC, France), Bruce Terris (Western Digital, USA), Kyung Jin Lee (Korea Univ., South Korea), Hideo Ohno (Tohoku Univ., Japan), Daniel Worledge (IBM, USA).

9th MRAM Global Innovation Forum 2017

7 December 2017 , Hilton Union Square, Imperial Ballroom, San Francisco


8:45 -9:00: Welcome and introduction

Session 1: STT-MRAM Technology

9:00-9:30 Luc Thomas (TDK/Headway)

STT-MRAM for embedded memory applications from eNVM to Last Level Cache

9:30-10:00   Guohan Hu (IBM)

Low-Current Spin Transfer Torque MRAM with Double MTJs

10:00-10-30  Cheng-Ming Lin  (TSMC)

MRAM Technology Solution for Embedded Memory Applications

10-30 – 11:00 : Coffee break

Session 2: Memory demonstration and impact on processor performance

11:00 – 11:30 Seung Kang (Qualcomm)

MRAM and Its Derivative Devices for Secure Semiconductor Systems in the Era of Internet-of-Things

11:30 – 12 : 00 Dave Eggleston (Global Foundries)

eMRAM: The March to Manufacturing

12:00 – 12:30 Yong Kyu Lee (Samsung Foundry Business, Samsung Electronics Co.)

Highly Manufacturable STT-MRAM Embedded Technology based on 28nm FDSOI RF-Logic Process  

12-30 – 14:00 : Lunch break (Yosemite room)

Session 3: SOT-MRAM and VCMA

14:00 – 14:30 S. Fukami (Tohoku Univ.)

Spin-orbit torque switching for ultralow-power VLSI and AI hardware

14:30 – 15:00 H.Yoda (Toshiba)

Voltage-Control Spintronics Memory having potentials for high-density and high-speed applications

Session 4: The needs (Automotive, IoT and AI) and potential/challenges ahead of MRAM

15:00 – 15:30 Tetsuo Endoh (Tohoku)

Embedded Nonvolatile Memory with STT-MRAMs and its Application for Nonvolatile Brain-Inspired VLSIs

15:30 – 16:00 Thomas Jew (NXP)

Embedding MRAM in Automotive and IoT Microcontroller Solutions

 16:00 – 16:30 Coffee break

16: 30 -17:30 Panel discussion:

PCRAM, ReRAM, MRAM: competing or complementary technologies?

Moderator: Daniel Worledge (IBM)

Panelists: Gabriele Navarro (CEA/LETI), Seung Kang (QUALCOMM), Thomas Jew (NXP), Tetsuo Endoh (Tohoku University), Chris Petti (Sandisk/WD)